Synopsys and Lattice Semiconductor Extend Multi-Year FPGA Synthesis OEM Agreement

MOUNTAIN VIEW, Calif., Aug. 5, 2013 Highlights:

• Multi-year contract renewal provides Lattice FPGA and CPLD users with Synopsys' technology-leading Synplify Pro logic synthesis tool
• Synplify Pro has been optimized for Lattice Semiconductor devices to deliver optimal Quality of Results (QoR) and fast timing closure
• Seamless integration with Lattice Diamond design software provides users with an integrated design flow for FPGA exploration, implementation and timing analysis

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, and Lattice Semiconductor Corporation (Nasdaq: LSCC) today announced a multi-year extension of their OEM agreement for Synopsys' Synplify^® FPGA synthesis tools optimized for Lattice FPGAs and Complex Programmable Logic Devices (CPLDs). With this agreement Synopsys continues to be the exclusive independent provider of FPGA logic synthesis technology for designers targeting Lattice FPGA and CPLD products.

"The extension of our long-standing relationship with Synopsys gives our customers continued access to a complete, easy-to-use FPGA synthesis design flow that enables them to meet the stringent timing and area requirements of their designs," said Mike Kendrick, director, software marketing at Lattice Semiconductor. "Synopsys' Synplify Pro^® synthesis software is optimized to take advantage of the architectural features of Lattice's programmable logic devices to deliver the superior performance and fast turnaround time required by our customers."

Synopsys' unique timing-driven approach to FPGA synthesis allows FPGA designers to achieve aggressive timing goals using Synplify Pro software. The timing-driven approach also contributes to overall lower product cost by enabling designers to meet timing requirements while minimizing the FPGA resources required for their design. For Lattice devices, the Synplify Pro software provides leading-edge HDL support with the HDL Analyst Tool, which automatically generates RTL schematics for analysis and cross-probing with RTL source code, and advanced synthesis technologies such as automatic RAM inferencing. The tight integration of Synplify Pro into Lattice's Diamond software environment ensures ease of use and high user productivity with RTL coding, constraint entry and logic synthesis through placement and routing.

"The high performance, low power applications targeted by FPGA designers require advanced synthesis tools that deliver optimal timing results while minimizing logic to enable the use of smaller, lower power devices," said Ed Bard, senior director of marketing, solutions group at Synopsys. "Our long-standing collaboration with Lattice continues to provide FPGA designers with the tools and support required to create highly optimized FPGA implementations in the shortest possible time."

Availability

Synplify Pro for Lattice devices is available now from Lattice Semiconductor and from Synopsys' SolvNet for customers that have purchased an all-vendor configuration of the Synplify Pro product. For more information on the complete design software environment for Lattice FPGAs, please visit: http://www.latticesemi.com/products/designsoftware/diamond/featurelist.cfm

About Lattice Semiconductor®

Lattice is a service-driven developer of innovative low cost, low power programmable design solutions. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at http://www.synopsys.com.

Editorial Contacts:
Tess Cahayag
Synopsys, Inc.
650-584-5446
[e-mail]

Stephen Brennan
MCA, Inc.
650-968-8900
[e-mail]

Bruce Fienberg
Lattice Semiconductor Corporation
408-826-6023
[e-mail]

SOURCE Synopsys, Inc.