Verifying super-scalar cores with formal guarantees
LONDON, UK / ACCESS Newswire / February 24, 2026 / Akeana, a leading provider of RISC-V IP, today confirmed that its partnership with Axiomise has been crucial for formally verifying its advanced super-scalar RISC-V test chip Alpine. The collaboration ensures that both functional and PPA (Power, Performance, Area) corner cases are thoroughly analyzed before silicon tape-out.
Alpine is 4nm silicon/software development board with high performance out-of-order cores, which requires a solid verification approach. "Within a few months of our engagement, Axiomise's formal verification expertise has not only identified functional issues but potential redundant logic, which we were not expecting. Their combination of automated tools and deep domain knowledge has shown us that formal verification will remain a valuable verification technology for us in the future", says Nitin Rajmohan, co-founder of Akeana Inc.
Axiomise's methodology combines deep formal verification expertise with its proprietary apps, such as formalISA, footprint, and floatrix, that are powered by CoreProve designed to obtain full proof convergence using the commercial EDA tools to provide end-to-end formal verification sign-off. By integrating advanced automation with expert-driven analysis, the team delivers mathematically proven results that ensure no bug is missed before RTL reaches silicon. This approach enables coverage from individual design blocks to full-chip, sign-off level verification, while also providing additional visibility into PPA-sensitive areas.
"We are delighted to work with Akeana to achieve exhaustive coverage on their super-scalar cores," says Dr. Ashish Darbari, CEO of Axiomise. "Formal verification provides guarantees that every corner case is analyzed. By combining our deep formal verification expertise and footprint, we are able to deliver insights across functional, performance, and area metrics, ensuring the highest quality verification for next-generation RISC-V designs."
Akeana's latest achievement includes the tape-out of Alpine , a 4nm silicon/software development board featuring high performance out-of-order cores. The project represents a significant milestone for high-performance RISC-V adoption and demonstrates the critical role formal verification plays in modern SoC design.
About Akeana
Akeana is a driving force of change in semiconductor IP innovation and performance, on a mission to deliver world-class RISC-V-based compute, interconnect, and AI accelerator IP solutions. Headquartered in Santa Clara, California, this venture-funded startup is dedicated to empowering customers with highly configurable technology and equitable licensing options, moving beyond the limitations of today's legacy vendors and architectures. With an experienced team of engineers, Akeana is at the forefront of easy-to-optimize semiconductor IP. Its growing patent portfolio reflects a commitment to meet the industry's ever-evolving needs and challenges. Supported by renowned investors, including Kleiner Perkins, Mayfield, and Fidelity Ventures, Akeana is redefining what's possible in microcontrollers, mobile computing, automotive, data centers, and cloud computing. https://www.akeana.com/ email: sales@akeana.com.
About Axiomise
Axiomise accelerates formal verification adoption through its unique combination of consulting, services, training, and custom software solutions. Axiomise is headquartered in the in the UK and was founded by Dr. Ashish Darbari (FBCS, FIETE, DPhil Oxon) and Dr. Vidya Chandran Darbari (PhD Cantab, MBBS, MRSB, FHEA). In the last 8 years, Axiomise has helped over 20 customers with a unique combination of formal verification training, having trained over thousand engineers and helping some of the biggest names in silicon design with its consulting & services and custom apps.
Engage with Axiomise at:
Website: www.axiomise.com
Twitter: @axiomise
LinkedIn: https://www.linkedin.com/company/axiomise/
Axiomise, CoreProve, footprint, formalISA, floatrix and the Axiomise logo are trademarks of Axiomise Limited, UK.
For more information, contact:
Fabiana Muto
Public Relations for Axiomise
+44 1442 345 046
fabiana.muto@axiomise.com
SOURCE: Axiomise Ltd.
View the original press release on ACCESS Newswire:
https://www.accessnewswire.com/newsroom/en/electronics-and-engineering/akeana-partners-with-axiomise-for-formal-verification-of-its-cores-1139799
